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This commit is contained in:
Vern Paxson 2024-06-09 13:31:52 -07:00
parent 7b65341104
commit 6272db4cdd
15 changed files with 144 additions and 137 deletions
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1
.typos.toml
View file

@ -24,6 +24,7 @@ extend-ignore-re = [
"ot\\[", "ot\\[",
"ot.size", "ot.size",
"ot.empty", "ot.empty",
"ot_i",
"ot.c_str", "ot.c_str",
"have_ot", "have_ot",
"if \\( ot == OP_.*", "if \\( ot == OP_.*",

2
auxil/gen-zam

@ -1 +1 @@
Subproject commit 99ed50067228651ba302dbe1ac7ebe11f787f5c2 Subproject commit 1c695e40618cd1f8ccbb5f838a250e79da2cba19

4
src/script_opt/ScriptOpt.cc
View file

@ -449,8 +449,8 @@ static void generate_CPP() {
extern void analyze_ZAM_insts(); extern void analyze_ZAM_insts();
static void analyze_scripts_for_ZAM() { static void analyze_scripts_for_ZAM() {
analyze_ZAM_insts(); // analyze_ZAM_insts();
exit(0); // exit(0);
if ( analysis_options.usage_issues > 0 && analysis_options.optimize_AST ) { if ( analysis_options.usage_issues > 0 && analysis_options.optimize_AST ) {
fprintf(stderr, fprintf(stderr,

28
src/script_opt/ZAM/AM-Opt.cc
View file

@ -336,8 +336,8 @@ void ZAMCompiler::ComputeFrameLifetimes() {
// Some special-casing. // Some special-casing.
switch ( inst->op ) { switch ( inst->op ) {
case OP_NEXT_TABLE_ITER_ii: case OP_NEXT_TABLE_ITER_ib:
case OP_NEXT_TABLE_ITER_VAL_VAR_Vii: { case OP_NEXT_TABLE_ITER_VAL_VAR_Vib: {
// These assign to an arbitrary long list of variables. // These assign to an arbitrary long list of variables.
auto& iter_vars = inst->aux->loop_vars; auto& iter_vars = inst->aux->loop_vars;
auto depth = inst->loop_depth; auto depth = inst->loop_depth;
@ -361,21 +361,21 @@ void ZAMCompiler::ComputeFrameLifetimes() {
} }
// No need to check the additional "var" associated // No need to check the additional "var" associated
// with OP_NEXT_TABLE_ITER_VAL_VAR_Vii as that's // with OP_NEXT_TABLE_ITER_VAL_VAR_Vib as that's
// a slot-1 assignment. However, similar to other // a slot-1 assignment. However, similar to other
// loop variables, mark this as a usage. // loop variables, mark this as a usage.
if ( inst->op == OP_NEXT_TABLE_ITER_VAL_VAR_Vii ) if ( inst->op == OP_NEXT_TABLE_ITER_VAL_VAR_Vib )
ExtendLifetime(inst->v1, EndOfLoop(inst, depth)); ExtendLifetime(inst->v1, EndOfLoop(inst, depth));
} break; } break;
case OP_NEXT_TABLE_ITER_NO_VARS_ii: break; case OP_NEXT_TABLE_ITER_NO_VARS_ib: break;
case OP_NEXT_TABLE_ITER_VAL_VAR_NO_VARS_Vii: { case OP_NEXT_TABLE_ITER_VAL_VAR_NO_VARS_Vib: {
auto depth = inst->loop_depth; auto depth = inst->loop_depth;
ExtendLifetime(inst->v1, EndOfLoop(inst, depth)); ExtendLifetime(inst->v1, EndOfLoop(inst, depth));
} break; } break;
case OP_NEXT_VECTOR_ITER_VAL_VAR_VVii: { case OP_NEXT_VECTOR_ITER_VAL_VAR_VVib: {
CheckSlotAssignment(inst->v2, inst); CheckSlotAssignment(inst->v2, inst);
auto depth = inst->loop_depth; auto depth = inst->loop_depth;
@ -383,13 +383,13 @@ void ZAMCompiler::ComputeFrameLifetimes() {
ExtendLifetime(inst->v2, EndOfLoop(inst, depth)); ExtendLifetime(inst->v2, EndOfLoop(inst, depth));
} break; } break;
case OP_NEXT_VECTOR_BLANK_ITER_VAL_VAR_Vii: { case OP_NEXT_VECTOR_BLANK_ITER_VAL_VAR_Vib: {
auto depth = inst->loop_depth; auto depth = inst->loop_depth;
ExtendLifetime(inst->v1, EndOfLoop(inst, depth)); ExtendLifetime(inst->v1, EndOfLoop(inst, depth));
} break; } break;
case OP_NEXT_VECTOR_ITER_Vii: case OP_NEXT_VECTOR_ITER_Vib:
case OP_NEXT_STRING_ITER_Vii: case OP_NEXT_STRING_ITER_Vib:
// Sometimes loops are written that don't actually // Sometimes loops are written that don't actually
// use the iteration variable. However, we still // use the iteration variable. However, we still
// need to mark the variable as having usage // need to mark the variable as having usage
@ -401,8 +401,8 @@ void ZAMCompiler::ComputeFrameLifetimes() {
ExtendLifetime(inst->v1, EndOfLoop(inst, inst->loop_depth)); ExtendLifetime(inst->v1, EndOfLoop(inst, inst->loop_depth));
break; break;
case OP_NEXT_VECTOR_BLANK_ITER_ii: case OP_NEXT_VECTOR_BLANK_ITER_ib:
case OP_NEXT_STRING_BLANK_ITER_ii: break; case OP_NEXT_STRING_BLANK_ITER_ib: break;
case OP_INIT_TABLE_LOOP_Vi: case OP_INIT_TABLE_LOOP_Vi:
case OP_INIT_VECTOR_LOOP_Vi: case OP_INIT_VECTOR_LOOP_Vi:
@ -549,8 +549,8 @@ void ZAMCompiler::ReMapFrame() {
// Handle special cases. // Handle special cases.
switch ( inst->op ) { switch ( inst->op ) {
case OP_NEXT_TABLE_ITER_ii: case OP_NEXT_TABLE_ITER_ib:
case OP_NEXT_TABLE_ITER_VAL_VAR_Vii: { case OP_NEXT_TABLE_ITER_VAL_VAR_Vib: {
// Rewrite iteration variables. // Rewrite iteration variables.
auto& iter_vars = inst->aux->loop_vars; auto& iter_vars = inst->aux->loop_vars;
for ( auto& v : iter_vars ) { for ( auto& v : iter_vars ) {

4
src/script_opt/ZAM/Branches.cc
View file

@ -25,13 +25,13 @@ ZAMStmt ZAMCompiler::GenGoTo(GoToSet& v) {
} }
ZAMStmt ZAMCompiler::GoToStub() { ZAMStmt ZAMCompiler::GoToStub() {
ZInstI z(OP_GOTO_i, 0); ZInstI z(OP_GOTO_b, 0);
z.op_type = OP_V_I1; z.op_type = OP_V_I1;
return AddInst(z); return AddInst(z);
} }
ZAMStmt ZAMCompiler::GoTo(const InstLabel l) { ZAMStmt ZAMCompiler::GoTo(const InstLabel l) {
ZInstI inst(OP_GOTO_i, 0); ZInstI inst(OP_GOTO_b, 0);
inst.target = l; inst.target = l;
inst.target_slot = 1; inst.target_slot = 1;
inst.op_type = OP_V_I1; inst.op_type = OP_V_I1;

16
src/script_opt/ZAM/BuiltIn.cc
View file

@ -434,14 +434,14 @@ SimpleZBI sta_ZBI{"subnet_to_addr", OP_SUBNET_TO_ADDR_VV, 1};
SimpleZBI ttd_ZBI{"time_to_double", OP_TIME_TO_DOUBLE_VV, 1}; SimpleZBI ttd_ZBI{"time_to_double", OP_TIME_TO_DOUBLE_VV, 1};
SimpleZBI tl_ZBI{"to_lower", OP_TO_LOWER_VV, 1}; SimpleZBI tl_ZBI{"to_lower", OP_TO_LOWER_VV, 1};
CondZBI ce_ZBI{"connection_exists", OP_CONN_EXISTS_VV, OP_CONN_EXISTS_COND_Vi, 1}; CondZBI ce_ZBI{"connection_exists", OP_CONN_EXISTS_VV, OP_CONN_EXISTS_COND_Vb, 1};
CondZBI iip_ZBI{"is_icmp_port", OP_IS_ICMP_PORT_VV, OP_IS_ICMP_PORT_COND_Vi, 1}; CondZBI iip_ZBI{"is_icmp_port", OP_IS_ICMP_PORT_VV, OP_IS_ICMP_PORT_COND_Vb, 1};
CondZBI itp_ZBI{"is_tcp_port", OP_IS_TCP_PORT_VV, OP_IS_TCP_PORT_COND_Vi, 1}; CondZBI itp_ZBI{"is_tcp_port", OP_IS_TCP_PORT_VV, OP_IS_TCP_PORT_COND_Vb, 1};
CondZBI iup_ZBI{"is_udp_port", OP_IS_UDP_PORT_VV, OP_IS_UDP_PORT_COND_Vi, 1}; CondZBI iup_ZBI{"is_udp_port", OP_IS_UDP_PORT_VV, OP_IS_UDP_PORT_COND_Vb, 1};
CondZBI iv4_ZBI{"is_v4_addr", OP_IS_V4_ADDR_VV, OP_IS_V4_ADDR_COND_Vi, 1}; CondZBI iv4_ZBI{"is_v4_addr", OP_IS_V4_ADDR_VV, OP_IS_V4_ADDR_COND_Vb, 1};
CondZBI iv6_ZBI{"is_v6_addr", OP_IS_V6_ADDR_VV, OP_IS_V6_ADDR_COND_Vi, 1}; CondZBI iv6_ZBI{"is_v6_addr", OP_IS_V6_ADDR_VV, OP_IS_V6_ADDR_COND_Vb, 1};
CondZBI rlt_ZBI{"reading_live_traffic", OP_READING_LIVE_TRAFFIC_V, OP_READING_LIVE_TRAFFIC_COND_i, 0}; CondZBI rlt_ZBI{"reading_live_traffic", OP_READING_LIVE_TRAFFIC_V, OP_READING_LIVE_TRAFFIC_COND_b, 0};
CondZBI rt_ZBI{"reading_traces", OP_READING_TRACES_V, OP_READING_TRACES_COND_i, 0}; CondZBI rt_ZBI{"reading_traces", OP_READING_TRACES_V, OP_READING_TRACES_COND_b, 0};
// These have a different form to avoid invoking copy constructors. // These have a different form to avoid invoking copy constructors.
auto cat_ZBI = CatZBI(); auto cat_ZBI = CatZBI();

4
src/script_opt/ZAM/OPs/internal.op
View file

@ -82,8 +82,8 @@ set-type $1
eval AssignTarget($$, CopyVal($1)) eval AssignTarget($$, CopyVal($1))
internal-op GoTo internal-op GoTo
class i class b
eval BRANCH($1) eval $1
internal-op Hook-Break internal-op Hook-Break
class X class X

32
src/script_opt/ZAM/OPs/iterations.op
View file

@ -11,20 +11,20 @@ internal-op Next-Table-Iter
op1-read op1-read
# v1 = iteration info # v1 = iteration info
# v2 = branch target if loop done # v2 = branch target if loop done
class ii class ib
eval NextTableIterPre($1, $2) eval NextTableIterPre($1, $2)
ti.NextIter(frame); ti.NextIter(frame);
macro NextTableIterPre(iter, branch) macro NextTableIterPre(iter, BRANCH)
auto& ti = (*tiv_ptr)[iter]; auto& ti = (*tiv_ptr)[iter];
if ( ti.IsDoneIterating() ) if ( ti.IsDoneIterating() )
BRANCH(branch) BRANCH
internal-op Next-Table-Iter-No-Vars internal-op Next-Table-Iter-No-Vars
op1-read op1-read
# v1 = iteration info # v1 = iteration info
# v2 = branch target if loop done # v2 = branch target if loop done
class ii class ib
eval NextTableIterPre($1, $2) eval NextTableIterPre($1, $2)
ti.IterFinished(); ti.IterFinished();
@ -32,7 +32,7 @@ internal-op Next-Table-Iter-Val-Var
# v1 = slot of the "ValueVar" # v1 = slot of the "ValueVar"
# v2 = iteration info # v2 = iteration info
# v3 = branch target if loop done # v3 = branch target if loop done
class Vii class Vib
eval NextTableIterPre($1, $2) eval NextTableIterPre($1, $2)
AssignTarget($$, ti.IterValue()); AssignTarget($$, ti.IterValue());
ti.NextIter(frame); ti.NextIter(frame);
@ -41,7 +41,7 @@ internal-op Next-Table-Iter-Val-Var-No-Vars
# v1 = slot of the "ValueVar" # v1 = slot of the "ValueVar"
# v2 = iteration info # v2 = iteration info
# v3 = branch target if loop done # v3 = branch target if loop done
class Vii class Vib
eval NextTableIterPre($1, $2) eval NextTableIterPre($1, $2)
AssignTarget($$, ti.IterValue()); AssignTarget($$, ti.IterValue());
ti.IterFinished(); ti.IterFinished();
@ -54,10 +54,10 @@ op-types V I
eval auto& vv = $1->RawVec(); eval auto& vv = $1->RawVec();
step_iters[$2].InitLoop(&vv); step_iters[$2].InitLoop(&vv);
macro NextVectorIterCore(info, branch) macro NextVectorIterCore(info, BRANCH)
auto& si = step_iters[info]; auto& si = step_iters[info];
if ( si.IsDoneIterating() ) if ( si.IsDoneIterating() )
BRANCH(branch) BRANCH
const auto& vv = *si.vv; const auto& vv = *si.vv;
if ( ! vv[si.iter] ) if ( ! vv[si.iter] )
{ /* Account for vector hole. Re-execute for next position. */ { /* Account for vector hole. Re-execute for next position. */
@ -70,7 +70,7 @@ internal-op Next-Vector-Iter
# v1 = iteration variable # v1 = iteration variable
# v2 = iteration info # v2 = iteration info
# v3 = branch target if loop done # v3 = branch target if loop done
class Vii class Vib
op-types U I I op-types U I I
eval NextVectorIterCore($1, $2) eval NextVectorIterCore($1, $2)
$$ = si.iter; $$ = si.iter;
@ -80,7 +80,7 @@ internal-op Next-Vector-Blank-Iter
# v1 = iteration info # v1 = iteration info
# v2 = branch target if loop done # v2 = branch target if loop done
op1-internal op1-internal
class ii class ib
eval NextVectorIterCore($1, $2) eval NextVectorIterCore($1, $2)
si.IterFinished(); si.IterFinished();
@ -90,7 +90,7 @@ internal-op Next-Vector-Iter-Val-Var
# v3 = iteration info # v3 = iteration info
# v4 = branch target if loop done # v4 = branch target if loop done
op1-read-write op1-read-write
class VVii class VVib
op-types U X I I op-types U X I I
eval NextVectorIterCore($2, $3) eval NextVectorIterCore($2, $3)
$$ = si.iter; $$ = si.iter;
@ -104,7 +104,7 @@ internal-op Next-Vector-Blank-Iter-Val-Var
# v1 = value variable # v1 = value variable
# v2 = iteration info # v2 = iteration info
# v3 = branch target if loop done # v3 = branch target if loop done
class Vii class Vib
eval NextVectorIterCore($1, $2) eval NextVectorIterCore($1, $2)
if ( Z_IS_MANAGED ) if ( Z_IS_MANAGED )
$$ = BuildVal(vv[si.iter]->ToVal(Z_TYPE), Z_TYPE); $$ = BuildVal(vv[si.iter]->ToVal(Z_TYPE), Z_TYPE);
@ -123,11 +123,11 @@ internal-op Next-String-Iter
# v1 = iteration variable # v1 = iteration variable
# v2 = iteration info # v2 = iteration info
# v3 = branch target if loop done # v3 = branch target if loop done
class Vii class Vib
op-types S I I op-types S I I
eval auto& si = step_iters[$1]; eval auto& si = step_iters[$1];
if ( si.IsDoneIterating() ) if ( si.IsDoneIterating() )
BRANCH($2) $2
auto bytes = (const char*) si.s->Bytes() + si.iter; auto bytes = (const char*) si.s->Bytes() + si.iter;
auto sv = new StringVal(1, bytes); auto sv = new StringVal(1, bytes);
Unref($$); Unref($$);
@ -138,10 +138,10 @@ internal-op Next-String-Blank-Iter
# v1 = iteration info # v1 = iteration info
# v2 = branch target if loop done # v2 = branch target if loop done
op1-internal op1-internal
class ii class ib
eval auto& si = step_iters[$1]; eval auto& si = step_iters[$1];
if ( si.IsDoneIterating() ) if ( si.IsDoneIterating() )
BRANCH($2) $2
si.IterFinished(); si.IterFinished();
internal-op End-Table-Loop internal-op End-Table-Loop

2
src/script_opt/ZAM/OPs/macros.op
View file

@ -38,4 +38,4 @@ macro AssignTarget(target, v) {
target = v; target = v;
} }
macro BRANCH(target) { DO_ZAM_PROFILE; pc = target; continue; } macro Branch(target) { DO_ZAM_PROFILE; pc = target; continue; }

16
src/script_opt/ZAM/OPs/non-uniform.op
View file

@ -142,17 +142,17 @@ eval EvalVal2InTablePre($1,$2,$3)
internal-op Val2-Is-In-Table-Cond internal-op Val2-Is-In-Table-Cond
op1-read op1-read
class VVVi class VVVb
eval EvalVal2InTablePre($1,$2,$3) eval EvalVal2InTablePre($1,$2,$3)
EvalVal2InTableCond($3, lvp, $4, !) EvalVal2InTableCond($3, lvp, $4, !)
macro EvalVal2InTableCond(tbl, op, target, negate) macro EvalVal2InTableCond(tbl, op, BRANCH, negate)
if ( negate tbl.table_val->Find(op) ) if ( negate tbl.table_val->Find(op) )
BRANCH(target) BRANCH
internal-op Val2-Is-Not-In-Table-Cond internal-op Val2-Is-Not-In-Table-Cond
op1-read op1-read
class VVVi class VVVb
eval EvalVal2InTablePre($1,$2,$3) eval EvalVal2InTablePre($1,$2,$3)
EvalVal2InTableCond($3, lvp, $4,) EvalVal2InTableCond($3, lvp, $4,)
@ -168,25 +168,25 @@ eval EvalVal2InTableCore($2.ToVal(Z_TYPE), $1.ToVal(Z_TYPE2))
internal-op Val2-Is-In-Table-Cond internal-op Val2-Is-In-Table-Cond
op1-read op1-read
class VViC class VVbC
eval EvalVal2InTableCore($1.ToVal(Z_TYPE2), $4.ToVal(Z_TYPE)) eval EvalVal2InTableCore($1.ToVal(Z_TYPE2), $4.ToVal(Z_TYPE))
EvalVal2InTableCond($2, lvp, $3, !) EvalVal2InTableCond($2, lvp, $3, !)
internal-op Val2-Is-In-Table-Cond internal-op Val2-Is-In-Table-Cond
op1-read op1-read
class VVCi class VVCb
eval EvalVal2InTableCore($3.ToVal(Z_TYPE), $1.ToVal(Z_TYPE2)) eval EvalVal2InTableCore($3.ToVal(Z_TYPE), $1.ToVal(Z_TYPE2))
EvalVal2InTableCond($2, lvp, $4, !) EvalVal2InTableCond($2, lvp, $4, !)
internal-op Val2-Is-Not-In-Table-Cond internal-op Val2-Is-Not-In-Table-Cond
op1-read op1-read
class VViC class VVbC
eval EvalVal2InTableCore($1.ToVal(Z_TYPE2), $4.ToVal(Z_TYPE)) eval EvalVal2InTableCore($1.ToVal(Z_TYPE2), $4.ToVal(Z_TYPE))
EvalVal2InTableCond($2, lvp, $3, ) EvalVal2InTableCond($2, lvp, $3, )
internal-op Val2-Is-Not-In-Table-Cond internal-op Val2-Is-Not-In-Table-Cond
op1-read op1-read
class VVCi class VVCb
eval EvalVal2InTableCore($3.ToVal(Z_TYPE), $1.ToVal(Z_TYPE2)) eval EvalVal2InTableCore($3.ToVal(Z_TYPE), $1.ToVal(Z_TYPE2))
EvalVal2InTableCond($2, lvp, $4, ) EvalVal2InTableCond($2, lvp, $4, )

16
src/script_opt/ZAM/OPs/stmts.op
View file

@ -164,11 +164,11 @@ eval auto v = $1->AsSubNet().AsString();
internal-op Branch-If-Not-Type internal-op Branch-If-Not-Type
op1-read op1-read
class Vi class Vb
op-types a I op-types a I
eval auto v = $1; eval auto v = $1;
if ( ! can_cast_value_to_type(v, Z_TYPE.get()) ) if ( ! can_cast_value_to_type(v, Z_TYPE.get()) )
BRANCH($2) $2
op CheckAnyLen op CheckAnyLen
@ -195,21 +195,21 @@ eval std::vector<ValPtr> vals;
internal-op If-Else internal-op If-Else
op1-read op1-read
class Vi class Vb
op-types I I op-types I I
eval if ( ! $1 ) BRANCH($2) eval if ( ! $1 ) $2
internal-op If internal-op If
op1-read op1-read
class Vi class Vb
op-types I I op-types I I
eval if ( ! $1 ) BRANCH($2) eval if ( ! $1 ) $2
internal-op If-Not internal-op If-Not
op1-read op1-read
class Vi class Vb
op-types I I op-types I I
eval if ( $1 ) BRANCH($2) eval if ( $1 ) $2
op AddStmt op AddStmt

20
src/script_opt/ZAM/OpAnaly.cc
View file

@ -46,26 +46,32 @@ void analyze_ZAM_inst(const char* op_name, const ZAMInstDesc& zid) {
int nslot = 0; int nslot = 0;
for ( size_t i = 0; i < oc.size(); ++i ) { for ( size_t i = 0; i < oc.size(); ++i ) {
auto oc_i = oc[i];
string op; string op;
switch ( oc[i] ) { switch ( oc_i ) {
case 'V': case 'V':
case 'R': op = "frame\\[z\\.v" + std::to_string(++nslot) + "\\]"; break; case 'R': op = "frame\\[z\\.v" + std::to_string(++nslot) + "\\]"; break;
case 'b':
case 'i': op = "z\\.v" + std::to_string(++nslot); break; case 'i': op = "z\\.v" + std::to_string(++nslot); break;
case 'C': op = "z\\.c"; break; case 'C': op = "z\\.c"; break;
default: default:
if ( have_ot && ot[i] != 'X' ) if ( have_ot && ot[i] != 'X' )
reporter->InternalError("instruction types mismatch: %s (%c)", op_name, oc[i]); reporter->InternalError("instruction types mismatch: %s (%c)", op_name, oc_i);
} }
auto match_pat = op; auto match_pat = op;
if ( have_ot ) { if ( have_ot ) {
if ( ot[i] == 'X' || oc[i] == 'i' ) { auto ot_i = ot[i];
if ( ot[i] == 'X' && oc[i] == 'i' ) bool bare_int = oc_i == 'i' || oc_i == 'b';
reporter->InternalError("empty instruction type for 'i' class element: %s", op_name);
if ( ot_i == 'X' || bare_int ) {
if ( ot_i == 'X' && bare_int )
reporter->InternalError("empty instruction type for '%c' class element: %s", oc_i, op_name);
if ( ! std::regex_search(eval, std::regex(op)) ) if ( ! std::regex_search(eval, std::regex(op)) )
reporter->InternalError("%s: operand %s not found", op_name, op.c_str()); reporter->InternalError("%s: operand %s not found", op_name, op.c_str());
@ -73,9 +79,9 @@ void analyze_ZAM_inst(const char* op_name, const ZAMInstDesc& zid) {
continue; continue;
} }
auto tp = type_pats.find(ot[i]); auto tp = type_pats.find(ot_i);
if ( tp == type_pats.end() ) if ( tp == type_pats.end() )
reporter->InternalError("%s: instruction type %c not found", op_name, ot[i]); reporter->InternalError("%s: instruction type %c not found", op_name, ot_i);
match_pat += ".(" + tp->second + ")"; match_pat += ".(" + tp->second + ")";
} }

110
src/script_opt/ZAM/Stmt.cc
View file

@ -136,7 +136,7 @@ const ZAMStmt ZAMCompiler::IfElse(const Expr* e, const Stmt* s1, const Stmt* s2)
if ( e->Tag() == EXPR_NAME ) { if ( e->Tag() == EXPR_NAME ) {
auto n = e->AsNameExpr(); auto n = e->AsNameExpr();
ZOp op = (s1 && s2) ? OP_IF_ELSE_Vi : (s1 ? OP_IF_Vi : OP_IF_NOT_Vi); ZOp op = (s1 && s2) ? OP_IF_ELSE_Vb : (s1 ? OP_IF_Vb : OP_IF_NOT_Vb);
ZInstI cond(op, FrameSlot(n), 0); ZInstI cond(op, FrameSlot(n), 0);
cond_stmt = AddInst(cond); cond_stmt = AddInst(cond);
@ -170,60 +170,60 @@ const ZAMStmt ZAMCompiler::IfElse(const Expr* e, const Stmt* s1, const Stmt* s2)
auto z = insts1[cond_stmt.stmt_num]; auto z = insts1[cond_stmt.stmt_num];
switch ( z->op ) { switch ( z->op ) {
case OP_IF_ELSE_Vi: case OP_IF_ELSE_Vb:
case OP_IF_Vi: case OP_IF_Vb:
case OP_IF_NOT_Vi: case OP_IF_NOT_Vb:
// These are generated correctly above, no need // These are generated correctly above, no need
// to fix up. // to fix up.
break; break;
case OP_HAS_FIELD_COND_Vii: z->op = OP_NOT_HAS_FIELD_COND_Vii; break; case OP_HAS_FIELD_COND_Vib: z->op = OP_NOT_HAS_FIELD_COND_Vib; break;
case OP_NOT_HAS_FIELD_COND_Vii: z->op = OP_HAS_FIELD_COND_Vii; break; case OP_NOT_HAS_FIELD_COND_Vib: z->op = OP_HAS_FIELD_COND_Vib; break;
case OP_CONN_EXISTS_COND_Vi: z->op = OP_NOT_CONN_EXISTS_COND_Vi; break; case OP_CONN_EXISTS_COND_Vb: z->op = OP_NOT_CONN_EXISTS_COND_Vb; break;
case OP_NOT_CONN_EXISTS_COND_Vi: z->op = OP_CONN_EXISTS_COND_Vi; break; case OP_NOT_CONN_EXISTS_COND_Vb: z->op = OP_CONN_EXISTS_COND_Vb; break;
case OP_IS_ICMP_PORT_COND_Vi: z->op = OP_NOT_IS_ICMP_PORT_COND_Vi; break; case OP_IS_ICMP_PORT_COND_Vb: z->op = OP_NOT_IS_ICMP_PORT_COND_Vb; break;
case OP_NOT_IS_ICMP_PORT_COND_Vi: z->op = OP_IS_ICMP_PORT_COND_Vi; break; case OP_NOT_IS_ICMP_PORT_COND_Vb: z->op = OP_IS_ICMP_PORT_COND_Vb; break;
case OP_IS_TCP_PORT_COND_Vi: z->op = OP_NOT_IS_TCP_PORT_COND_Vi; break; case OP_IS_TCP_PORT_COND_Vb: z->op = OP_NOT_IS_TCP_PORT_COND_Vb; break;
case OP_NOT_IS_TCP_PORT_COND_Vi: z->op = OP_IS_TCP_PORT_COND_Vi; break; case OP_NOT_IS_TCP_PORT_COND_Vb: z->op = OP_IS_TCP_PORT_COND_Vb; break;
case OP_IS_UDP_PORT_COND_Vi: z->op = OP_NOT_IS_UDP_PORT_COND_Vi; break; case OP_IS_UDP_PORT_COND_Vb: z->op = OP_NOT_IS_UDP_PORT_COND_Vb; break;
case OP_NOT_IS_UDP_PORT_COND_Vi: z->op = OP_IS_UDP_PORT_COND_Vi; break; case OP_NOT_IS_UDP_PORT_COND_Vb: z->op = OP_IS_UDP_PORT_COND_Vb; break;
case OP_IS_V4_ADDR_COND_Vi: z->op = OP_NOT_IS_V4_ADDR_COND_Vi; break; case OP_IS_V4_ADDR_COND_Vb: z->op = OP_NOT_IS_V4_ADDR_COND_Vb; break;
case OP_NOT_IS_V4_ADDR_COND_Vi: z->op = OP_IS_V4_ADDR_COND_Vi; break; case OP_NOT_IS_V4_ADDR_COND_Vb: z->op = OP_IS_V4_ADDR_COND_Vb; break;
case OP_IS_V6_ADDR_COND_Vi: z->op = OP_NOT_IS_V6_ADDR_COND_Vi; break; case OP_IS_V6_ADDR_COND_Vb: z->op = OP_NOT_IS_V6_ADDR_COND_Vb; break;
case OP_NOT_IS_V6_ADDR_COND_Vi: z->op = OP_IS_V6_ADDR_COND_Vi; break; case OP_NOT_IS_V6_ADDR_COND_Vb: z->op = OP_IS_V6_ADDR_COND_Vb; break;
case OP_READING_LIVE_TRAFFIC_COND_i: z->op = OP_NOT_READING_LIVE_TRAFFIC_COND_i; break; case OP_READING_LIVE_TRAFFIC_COND_b: z->op = OP_NOT_READING_LIVE_TRAFFIC_COND_b; break;
case OP_NOT_READING_LIVE_TRAFFIC_COND_i: z->op = OP_READING_LIVE_TRAFFIC_COND_i; break; case OP_NOT_READING_LIVE_TRAFFIC_COND_b: z->op = OP_READING_LIVE_TRAFFIC_COND_b; break;
case OP_READING_TRACES_COND_i: z->op = OP_NOT_READING_TRACES_COND_i; break; case OP_READING_TRACES_COND_b: z->op = OP_NOT_READING_TRACES_COND_b; break;
case OP_NOT_READING_TRACES_COND_i: z->op = OP_READING_TRACES_COND_i; break; case OP_NOT_READING_TRACES_COND_b: z->op = OP_READING_TRACES_COND_b; break;
case OP_TABLE_HAS_ELEMENTS_COND_Vi: z->op = OP_NOT_TABLE_HAS_ELEMENTS_COND_Vi; break; case OP_TABLE_HAS_ELEMENTS_COND_Vb: z->op = OP_NOT_TABLE_HAS_ELEMENTS_COND_Vb; break;
case OP_NOT_TABLE_HAS_ELEMENTS_COND_Vi: z->op = OP_TABLE_HAS_ELEMENTS_COND_Vi; break; case OP_NOT_TABLE_HAS_ELEMENTS_COND_Vb: z->op = OP_TABLE_HAS_ELEMENTS_COND_Vb; break;
case OP_VECTOR_HAS_ELEMENTS_COND_Vi: z->op = OP_NOT_VECTOR_HAS_ELEMENTS_COND_Vi; break; case OP_VECTOR_HAS_ELEMENTS_COND_Vb: z->op = OP_NOT_VECTOR_HAS_ELEMENTS_COND_Vb; break;
case OP_NOT_VECTOR_HAS_ELEMENTS_COND_Vi: z->op = OP_VECTOR_HAS_ELEMENTS_COND_Vi; break; case OP_NOT_VECTOR_HAS_ELEMENTS_COND_Vb: z->op = OP_VECTOR_HAS_ELEMENTS_COND_Vb; break;
case OP_VAL_IS_IN_TABLE_COND_VVi: z->op = OP_NOT_VAL_IS_IN_TABLE_COND_VVi; break; case OP_VAL_IS_IN_TABLE_COND_VVb: z->op = OP_NOT_VAL_IS_IN_TABLE_COND_VVb; break;
case OP_NOT_VAL_IS_IN_TABLE_COND_VVi: z->op = OP_VAL_IS_IN_TABLE_COND_VVi; break; case OP_NOT_VAL_IS_IN_TABLE_COND_VVb: z->op = OP_VAL_IS_IN_TABLE_COND_VVb; break;
case OP_CONST_IS_IN_TABLE_COND_VCi: z->op = OP_NOT_CONST_IS_IN_TABLE_COND_VCi; break; case OP_CONST_IS_IN_TABLE_COND_VCb: z->op = OP_NOT_CONST_IS_IN_TABLE_COND_VCb; break;
case OP_NOT_CONST_IS_IN_TABLE_COND_VCi: z->op = OP_CONST_IS_IN_TABLE_COND_VCi; break; case OP_NOT_CONST_IS_IN_TABLE_COND_VCb: z->op = OP_CONST_IS_IN_TABLE_COND_VCb; break;
case OP_VAL2_IS_IN_TABLE_COND_VVVi: z->op = OP_VAL2_IS_NOT_IN_TABLE_COND_VVVi; break; case OP_VAL2_IS_IN_TABLE_COND_VVVb: z->op = OP_VAL2_IS_NOT_IN_TABLE_COND_VVVb; break;
case OP_VAL2_IS_NOT_IN_TABLE_COND_VVVi: z->op = OP_VAL2_IS_IN_TABLE_COND_VVVi; break; case OP_VAL2_IS_NOT_IN_TABLE_COND_VVVb: z->op = OP_VAL2_IS_IN_TABLE_COND_VVVb; break;
case OP_VAL2_IS_IN_TABLE_COND_VViC: z->op = OP_VAL2_IS_NOT_IN_TABLE_COND_VViC; break; case OP_VAL2_IS_IN_TABLE_COND_VVbC: z->op = OP_VAL2_IS_NOT_IN_TABLE_COND_VVbC; break;
case OP_VAL2_IS_NOT_IN_TABLE_COND_VViC: z->op = OP_VAL2_IS_IN_TABLE_COND_VViC; break; case OP_VAL2_IS_NOT_IN_TABLE_COND_VVbC: z->op = OP_VAL2_IS_IN_TABLE_COND_VVbC; break;
case OP_VAL2_IS_IN_TABLE_COND_VVCi: z->op = OP_VAL2_IS_NOT_IN_TABLE_COND_VVCi; break; case OP_VAL2_IS_IN_TABLE_COND_VVCb: z->op = OP_VAL2_IS_NOT_IN_TABLE_COND_VVCb; break;
case OP_VAL2_IS_NOT_IN_TABLE_COND_VVCi: z->op = OP_VAL2_IS_IN_TABLE_COND_VVCi; break; case OP_VAL2_IS_NOT_IN_TABLE_COND_VVCb: z->op = OP_VAL2_IS_IN_TABLE_COND_VVCb; break;
default: reporter->InternalError("inconsistency in ZAMCompiler::IfElse"); default: reporter->InternalError("inconsistency in ZAMCompiler::IfElse");
} }
@ -238,7 +238,7 @@ const ZAMStmt ZAMCompiler::GenCond(const Expr* e, int& branch_v) {
if ( e->Tag() == EXPR_HAS_FIELD ) { if ( e->Tag() == EXPR_HAS_FIELD ) {
auto hf = e->AsHasFieldExpr(); auto hf = e->AsHasFieldExpr();
auto z = GenInst(OP_HAS_FIELD_COND_Vii, op1->AsNameExpr(), hf->Field()); auto z = GenInst(OP_HAS_FIELD_COND_Vib, op1->AsNameExpr(), hf->Field());
z.op_type = OP_VVV_I2_I3; z.op_type = OP_VVV_I2_I3;
branch_v = 3; branch_v = 3;
return AddInst(z); return AddInst(z);
@ -255,14 +255,14 @@ const ZAMStmt ZAMCompiler::GenCond(const Expr* e, int& branch_v) {
} }
if ( op1->Tag() == EXPR_NAME ) { if ( op1->Tag() == EXPR_NAME ) {
auto z = GenInst(OP_VAL_IS_IN_TABLE_COND_VVi, op1->AsNameExpr(), op2, 0); auto z = GenInst(OP_VAL_IS_IN_TABLE_COND_VVb, op1->AsNameExpr(), op2, 0);
z.t = op1->GetType(); z.t = op1->GetType();
branch_v = 3; branch_v = 3;
return AddInst(z); return AddInst(z);
} }
if ( op1->Tag() == EXPR_CONST ) { if ( op1->Tag() == EXPR_CONST ) {
auto z = GenInst(OP_CONST_IS_IN_TABLE_COND_VCi, op2, op1->AsConstExpr(), 0); auto z = GenInst(OP_CONST_IS_IN_TABLE_COND_VCb, op2, op1->AsConstExpr(), 0);
z.t = op1->GetType(); z.t = op1->GetType();
branch_v = 2; branch_v = 2;
return AddInst(z); return AddInst(z);
@ -290,19 +290,19 @@ const ZAMStmt ZAMCompiler::GenCond(const Expr* e, int& branch_v) {
ZInstI z; ZInstI z;
if ( name0 && name1 ) { if ( name0 && name1 ) {
z = GenInst(OP_VAL2_IS_IN_TABLE_COND_VVVi, n0, n1, op2, 0); z = GenInst(OP_VAL2_IS_IN_TABLE_COND_VVVb, n0, n1, op2, 0);
branch_v = 4; branch_v = 4;
z.t2 = n0->GetType(); z.t2 = n0->GetType();
} }
else if ( name0 ) { else if ( name0 ) {
z = GenInst(OP_VAL2_IS_IN_TABLE_COND_VViC, n0, op2, c1, 0); z = GenInst(OP_VAL2_IS_IN_TABLE_COND_VVbC, n0, op2, c1, 0);
branch_v = 3; branch_v = 3;
z.t2 = n0->GetType(); z.t2 = n0->GetType();
} }
else if ( name1 ) { else if ( name1 ) {
z = GenInst(OP_VAL2_IS_IN_TABLE_COND_VVCi, n1, op2, c0, 0); z = GenInst(OP_VAL2_IS_IN_TABLE_COND_VVCb, n1, op2, c0, 0);
branch_v = 3; branch_v = 3;
z.t2 = n1->GetType(); z.t2 = n1->GetType();
} }
@ -310,7 +310,7 @@ const ZAMStmt ZAMCompiler::GenCond(const Expr* e, int& branch_v) {
else { // Both are constants, assign first to temporary. else { // Both are constants, assign first to temporary.
auto slot = TempForConst(c0); auto slot = TempForConst(c0);
z = ZInstI(OP_VAL2_IS_IN_TABLE_COND_VViC, slot, FrameSlot(op2), 0, c1); z = ZInstI(OP_VAL2_IS_IN_TABLE_COND_VVbC, slot, FrameSlot(op2), 0, c1);
z.op_type = OP_VVVC_I3; z.op_type = OP_VVVC_I3;
branch_v = 3; branch_v = 3;
z.t2 = c0->GetType(); z.t2 = c0->GetType();
@ -332,9 +332,9 @@ const ZAMStmt ZAMCompiler::GenCond(const Expr* e, int& branch_v) {
ZOp op; ZOp op;
if ( aggr->GetType()->Tag() == TYPE_TABLE ) if ( aggr->GetType()->Tag() == TYPE_TABLE )
op = OP_TABLE_HAS_ELEMENTS_COND_Vi; op = OP_TABLE_HAS_ELEMENTS_COND_Vb;
else else
op = OP_VECTOR_HAS_ELEMENTS_COND_Vi; op = OP_VECTOR_HAS_ELEMENTS_COND_Vb;
branch_v = 2; branch_v = 2;
return AddInst(GenInst(op, aggr, +0)); return AddInst(GenInst(op, aggr, +0));
@ -577,7 +577,7 @@ const ZAMStmt ZAMCompiler::TypeSwitch(const SwitchStmt* sw, const NameExpr* v, c
ZInstI z; ZInstI z;
z = ZInstI(OP_BRANCH_IF_NOT_TYPE_Vi, slot, 0); z = ZInstI(OP_BRANCH_IF_NOT_TYPE_Vb, slot, 0);
z.SetType(type); z.SetType(type);
auto case_test = AddInst(z); auto case_test = AddInst(z);
@ -699,7 +699,7 @@ const ZAMStmt ZAMCompiler::While(const Stmt* cond_stmt, const Expr* cond, const
if ( cond->Tag() == EXPR_NAME ) { if ( cond->Tag() == EXPR_NAME ) {
auto n = cond->AsNameExpr(); auto n = cond->AsNameExpr();
cond_IF = AddInst(ZInstI(OP_IF_Vi, FrameSlot(n), 0)); cond_IF = AddInst(ZInstI(OP_IF_Vb, FrameSlot(n), 0));
branch_v = 2; branch_v = 2;
} }
else else
@ -786,13 +786,13 @@ const ZAMStmt ZAMCompiler::LoopOverTable(const ForStmt* f, const NameExpr* val)
auto iter_head = StartingBlock(); auto iter_head = StartingBlock();
if ( value_var ) { if ( value_var ) {
ZOp op = no_loop_vars ? OP_NEXT_TABLE_ITER_VAL_VAR_NO_VARS_Vii : OP_NEXT_TABLE_ITER_VAL_VAR_Vii; ZOp op = no_loop_vars ? OP_NEXT_TABLE_ITER_VAL_VAR_NO_VARS_Vib : OP_NEXT_TABLE_ITER_VAL_VAR_Vib;
z = ZInstI(op, FrameSlot(value_var), iter_slot, 0); z = ZInstI(op, FrameSlot(value_var), iter_slot, 0);
z.CheckIfManaged(value_var->GetType()); z.CheckIfManaged(value_var->GetType());
z.op_type = OP_VVV_I2_I3; z.op_type = OP_VVV_I2_I3;
} }
else { else {
ZOp op = no_loop_vars ? OP_NEXT_TABLE_ITER_NO_VARS_ii : OP_NEXT_TABLE_ITER_ii; ZOp op = no_loop_vars ? OP_NEXT_TABLE_ITER_NO_VARS_ib : OP_NEXT_TABLE_ITER_ib;
z = ZInstI(op, iter_slot, 0); z = ZInstI(op, iter_slot, 0);
z.op_type = OP_VV_I1_I2; z.op_type = OP_VV_I1_I2;
} }
@ -819,11 +819,11 @@ const ZAMStmt ZAMCompiler::LoopOverVector(const ForStmt* f, const NameExpr* val)
if ( value_var ) { if ( value_var ) {
if ( slot >= 0 ) { if ( slot >= 0 ) {
z = ZInstI(OP_NEXT_VECTOR_ITER_VAL_VAR_VVii, slot, FrameSlot(value_var), iter_slot, 0); z = ZInstI(OP_NEXT_VECTOR_ITER_VAL_VAR_VVib, slot, FrameSlot(value_var), iter_slot, 0);
z.op_type = OP_VVVV_I3_I4; z.op_type = OP_VVVV_I3_I4;
} }
else { else {
z = ZInstI(OP_NEXT_VECTOR_BLANK_ITER_VAL_VAR_Vii, FrameSlot(value_var), iter_slot, 0); z = ZInstI(OP_NEXT_VECTOR_BLANK_ITER_VAL_VAR_Vib, FrameSlot(value_var), iter_slot, 0);
z.op_type = OP_VVV_I2_I3; z.op_type = OP_VVV_I2_I3;
} }
@ -833,11 +833,11 @@ const ZAMStmt ZAMCompiler::LoopOverVector(const ForStmt* f, const NameExpr* val)
else { else {
if ( slot >= 0 ) { if ( slot >= 0 ) {
z = ZInstI(OP_NEXT_VECTOR_ITER_Vii, slot, iter_slot, 0); z = ZInstI(OP_NEXT_VECTOR_ITER_Vib, slot, iter_slot, 0);
z.op_type = OP_VVV_I2_I3; z.op_type = OP_VVV_I2_I3;
} }
else { else {
z = ZInstI(OP_NEXT_VECTOR_BLANK_ITER_ii, iter_slot, 0); z = ZInstI(OP_NEXT_VECTOR_BLANK_ITER_ib, iter_slot, 0);
z.op_type = OP_VV_I1_I2; z.op_type = OP_VV_I1_I2;
} }
} }
@ -869,11 +869,11 @@ const ZAMStmt ZAMCompiler::LoopOverString(const ForStmt* f, const Expr* e) {
auto iter_head = StartingBlock(); auto iter_head = StartingBlock();
if ( loop_var->IsBlank() ) { if ( loop_var->IsBlank() ) {
z = ZInstI(OP_NEXT_STRING_BLANK_ITER_ii, iter_slot, 0); z = ZInstI(OP_NEXT_STRING_BLANK_ITER_ib, iter_slot, 0);
z.op_type = OP_VV_I1_I2; z.op_type = OP_VV_I1_I2;
} }
else { else {
z = ZInstI(OP_NEXT_STRING_ITER_Vii, FrameSlot(loop_var), iter_slot, 0); z = ZInstI(OP_NEXT_STRING_ITER_Vib, FrameSlot(loop_var), iter_slot, 0);
z.op_type = OP_VVV_I2_I3; z.op_type = OP_VVV_I2_I3;
z.is_managed = true; z.is_managed = true;
} }

24
src/script_opt/ZAM/ZInst.cc
View file

@ -229,16 +229,16 @@ ValPtr ZInst::ConstVal() const {
bool ZInst::IsLoopIterationAdvancement() const { bool ZInst::IsLoopIterationAdvancement() const {
switch ( op ) { switch ( op ) {
case OP_NEXT_TABLE_ITER_ii: case OP_NEXT_TABLE_ITER_ib:
case OP_NEXT_TABLE_ITER_NO_VARS_ii: case OP_NEXT_TABLE_ITER_NO_VARS_ib:
case OP_NEXT_TABLE_ITER_VAL_VAR_Vii: case OP_NEXT_TABLE_ITER_VAL_VAR_Vib:
case OP_NEXT_TABLE_ITER_VAL_VAR_NO_VARS_Vii: case OP_NEXT_TABLE_ITER_VAL_VAR_NO_VARS_Vib:
case OP_NEXT_VECTOR_ITER_Vii: case OP_NEXT_VECTOR_ITER_Vib:
case OP_NEXT_VECTOR_BLANK_ITER_ii: case OP_NEXT_VECTOR_BLANK_ITER_ib:
case OP_NEXT_VECTOR_ITER_VAL_VAR_VVii: case OP_NEXT_VECTOR_ITER_VAL_VAR_VVib:
case OP_NEXT_VECTOR_BLANK_ITER_VAL_VAR_Vii: case OP_NEXT_VECTOR_BLANK_ITER_VAL_VAR_Vib:
case OP_NEXT_STRING_ITER_Vii: case OP_NEXT_STRING_ITER_Vib:
case OP_NEXT_STRING_BLANK_ITER_ii: return true; case OP_NEXT_STRING_BLANK_ITER_ib: return true;
default: return false; default: return false;
} }
@ -281,7 +281,7 @@ bool ZInst::AssignsToSlot1() const {
bool ZInst::AssignsToSlot(int slot) const { bool ZInst::AssignsToSlot(int slot) const {
switch ( op ) { switch ( op ) {
case OP_NEXT_VECTOR_ITER_VAL_VAR_VVii: return slot == 1 || slot == 2; case OP_NEXT_VECTOR_ITER_VAL_VAR_VVib: return slot == 1 || slot == 2;
default: return slot == 1 && AssignsToSlot1(); default: return slot == 1 && AssignsToSlot1();
} }
@ -358,7 +358,7 @@ string ZInstI::VName(int n, const FrameMap* frame_ids, const FrameReMap* remappi
bool ZInstI::DoesNotContinue() const { bool ZInstI::DoesNotContinue() const {
switch ( op ) { switch ( op ) {
case OP_GOTO_i: case OP_GOTO_b:
case OP_HOOK_BREAK_X: case OP_HOOK_BREAK_X:
case OP_RETURN_C: case OP_RETURN_C:
case OP_RETURN_V: case OP_RETURN_V:

2
src/script_opt/ZAM/ZInst.h
View file

@ -214,7 +214,7 @@ public:
// True if this instruction always branches elsewhere. Different // True if this instruction always branches elsewhere. Different
// from DoesNotContinue() in that returns & hook breaks do not // from DoesNotContinue() in that returns & hook breaks do not
// continue, but they are not branches. // continue, but they are not branches.
bool IsUnconditionalBranch() const { return op == OP_GOTO_i; } bool IsUnconditionalBranch() const { return op == OP_GOTO_b; }
// True if this instruction is of the form "v1 = v2". // True if this instruction is of the form "v1 = v2".
bool IsDirectAssignment() const; bool IsDirectAssignment() const;